1. Field of the Invention
The present invention relates to a semiconductor memory device used in a data processor and, more particularly, to a semiconductor memory device having a programmable read-only memory (PROM) with an output register.
2. Description of the Related Arts
In a conventional PROM with an output register, the storage contents of the PROM are controlled and transferred to an output register in response to a clock signal. The read data is then supplied externally through the output buffer. A conventional semiconductor memory device including a PROM with an output register receives an address input, a chip enable input, a clock input, a preset input, and a clear input, as well as a power supply voltage and ground potential to generate storage contents. In order to increase a memory capacity in such a semiconductor memory device, the number of input/output terminals is an important issue. For example, when a 24-pin IC package is used as a 4-Kbit memory device, all inputs/outputs can be assigned to the pins. However, when the capacity of the IC memory is increased to 8Kbit, the number of address bits is increased by one, one pin is occupied by such increased address bit, and accordingly, the number of pins becomes short. In this case, the clear or preset input must be omitted. This input indicates that the contents of the output register are cleared or set at logic " 0" or preset or set at logic "1". Accordingly, given threshold cannot be directly set for the output register to omit read access of the memory, and thus the program cannot be simplified. Therefore, the device loses much of its adaptability, with a resulting loss in the convenience thereof.
A conventional circuit has been proposed to solve the above problem. According to this circuit, an initialize input INIT (barred INIT) is used in place of a clear or preset input, and PROM (real memory cell) or initial data is set in response to the initialize input signal. For example, after the PROM data is multiplexed by an address input (A0 to A2), the multiplexed PROM data is supplied to an initial word and is output. In another conventional circuit, PROM data and separately supplied initial data are multiplexed by the initial data signal INIT and the address input (A0 to A2), and the multiplexed PROM or initial data is output.
The shortage of input terminals can be resolved by the above-mentioned conventional circuits. However, the circuit arrangement is complicated, and a high packing density and high-speed operation cannot be achieved.